"Throw it over the wall" is business slang for completing your part of a project and then passing it off to the next group. This phrase is usually said when there is little communication between two groups.—answers.com
I have noticed that a common scenario is for the engineers who developed the Universal Power Format (UPF) files for a device to throw it over the wall to the verification engineers assigned to run power-aware simulations. The verification engineers start power-aware simulations with specifications, block diagrams, and a stack of UPF files. When power-aware simulations first start, many of the problems uncovered are related to the Power Supply Network (PSN).
The PSN refers to the items necessary to manage and control a device’s power. The PSN consists of:
- Power domains
- Supply ports
- Supply nets
- Power switches
The PSN is the heart of the UPF and has to be defined before power-aware simulations can be run. For verification engineers who are new to low-power design, working with and debugging the PSN can be a real culture shock. This is because they are not used to working with power domains, supply ports/nets, power switches, and their interconnections.
By working closely with our users in the debugging of large SoC designs, we have found that is it very helpful to have a graphical representation of the PSN for reference. This experience led us to develop a PSN browser that provides a graphical representation of the PSN with power-aware models and their power connections. The PSN browser has been used to debug complex PSN and quickly find problems like shorted power nets, missing power connections at block-level UPF, and power-aware models. A screen shot of the PSN browser is shown below:
In the PSN screen shot, you can see all the supply ports, supply nets, power domains, power switches, and the supply net value (FULL_ON, UNDETERMINED ...). When power-aware simulation is first run, many of the problems are easy to see in the PSN. Having a graphical representation and access to the structures is very important for debug.
Here's an example: We were asked to help debug a power problem in a SoC design. In one of the power domains, the main power supply net was undetermined, and the shutoff signal was driven to a known value. Several engineers had looked at this problem, and no one could figure out why this was happening. The UPF was hierarchical with five power domains at the top level and two in the block level. The top-level UPF file had around 2600 lines of the code, and the block-level UPF had an additional 650 lines of code. The PSN of this design was viewed in the PSN browser and we quickly found that the output supply port of a power switch was shorted to the input supply port. The UPF contained supply sets and the problem was not found in the text editor, but was very easy to find in the PSN browser.
The Power Supply Network browser is available in IES version 13.2 and later. More information can be found in the Introduction to Low-Power Simulation RAK, IEEE-1801 version. This can be found on the Cadence Online Support site at http://support.cadence.com.
As someone who often gets problematic UPF files thrown over the wall to me, I always use the PSN browser in debugging problems in those files.
William Winkeler