Cadence returns to DAC 2017 this year, showcasing our full verification suite. Here are some of the things you can look forward to from us in the upcoming week.
Once again, Cadence has the Expert Bar on Monday, Tuesday, and Wednesday. The Expert Bar is where engineers can visit our booth and have conversations with our technical experts. Cadence will be running many sessions, and those topics are listed below.
Topics List | Scheduled Time | Featured Products |
Automotive: Functional Safety Focus | Tues 1:00-2:30, Wed 4:00-6:00 | Xcelium Safety, DSG full-flow |
Simplify SoC Verification with VIP | Mon 2:30-4:00, Tues 11:30-1:00 | Cadence VIP |
Performance Analysis and Traffic Optimization for ARM-Based SoCs | Mon 4:00-6:00, Wed 2:30-4:00 | Interconnect Workbench, Palladium Z1, Xcelium simulator, vManager |
Formal Verification Featuring the JasperGold Platform | Tues 2:30-4:00, Wed 2:30-4:00 | JasperGold Apps |
System Verification and HW/SW Co-Verification with the Palladium Z1 Platform | Tues 1:00-2:30, Wed 10:00-11:30 | Palladium Z1 |
Software Development with Protium S1 FPGA-Based Prototyping Platform | Tues 4:00-6:00, Wed 11:30-1:00 | Protium S1 |
Verification Fabric: Portable Stimulus Generation Featuring Perspec System Verifier | Tues 10:00-11:30, Wed 1:00-2:30 | Perspec System Verifier |
High-Performance Simulation with Xcelium Parallel Simulation | Tues 11:30-1:00, Wed 1:00-2:30 | Xcelium Simulator |
Verification Fabric: Plan, Coverage, and Debug with vManager and Indago Solutions | Tues 1:00-2:30, Wed 4:00-6:00 | vManager,, Indago |
The Future of Verification with the Cadence Verification Suite | Mon 2:30-4:00 | Cadence Verification Suite |
Cadence Verification Implementation Solutions for ARM-Based Designs | Mon 10:00-11:30, Tues 1:00-2:30 |
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Cadence will also be offering Tech Sessions—hour-long presentations about a singular topic. These will be held throughout DAC and cover the breadth of verification as listed below:
Topics List | Scheduled Time | Featured Products |
Finding More Bugs Earlier in IP Verification by Integrating Formal Verification with UVM | Mon 3:30-4:30 | JasperGold Apps, Verification IP, Xcelium Single-Core Simulator |
High-Speed SoC Verification Leveraging Portable Stimulus with Multi-Core Simulation and Hardware Acceleration | Tues 2:30-3:30 | Perspec System Verifier, Xcelium Multi-Core Simulator, Palladium Z1 |
Optimally Balancing FPGA-Based Prototyping and Emulation for Verification, Regressions, and Software Development | Wed 10:30-11:30 | Palladium Z1, Protium S1, Palladium Hybrid |
Automotive Functional Safety Verification | Tues 3:30-4:30 | Xcelium Safety |
RTL Designer Signoff with JasperGold Superlint and CDC Apps | Tues 12:30-1:30, Wed 11:30-12:30 | JasperGold Apps |
Cadence Verification Suite: Core Engines, Fabric Technologies, and Solutions | Wed 2:30-3:30 | Cadence Verification Suite |
In addition to these presentations, Cadence will be hosting a verification luncheon that offers a panel of experts from a variety of different companies to answer verification-related questions. In Monday’s luncheon, Cadence will share a table with Vista Ventures LLC, Hewett Packard Enterprise, and Intel to discuss “Towards Smarter Verification”—a panel asserting that the next big change in verification technology is not necessarily a new engine, but improved communication and compatibility between existing engines that may be optimized for different tasks. This panel will talk about how verification is changing in today’s application-specific world, as well as utilizing machine learning technology to assist in data analytics, among other topics.
Cadence technology experts will also be holding other events during DAC. Of chief importance are “Tutorial 8: An Introduction to the Accellera Portable Stimulus Standard,” presented by Sharon Rosenberg in room 18CD on Monday from 1:30pm to 3:00pm. The Designer/IP Track Poster Session regarding “Automating Generation of System Use Cases Using Model-Based Portable Stimulus Approach” is another important event, presented by Frederik Kautz, Christian Sauer, and Joerg Simon from 5:00pm to 6:00pm on the Exhibit Floor.
We have many exciting things in store for those who attend, and we hope to see you all at DAC this week!