Freedom of choice is a term we hear a lot, especially in the last 10 years. It is defined in wikipedia as “an individual's opportunity and autonomy to perform an action selected from at least two available options…”.
Is having many choices always a good thing? Well, usually it is- who would not want to live in a world where s/he has options and can make choices? However, there are also downsides to having multiple options. In the TED lecture, The paradox of choice, Barry Schwartz discusses the negative aspects of having too many choices.
For example, in the healthcare world- in some cases, your physician might present you with a few options and let you make the right medical choice for yourself. Is it necessarily a good thing? Do you always feel you have the tools to make this choice?...
Freedom of Choice is discussed a lot in the context of many fields such as, law, economics, and well being. But, what does freedom of choice mean in the context of verification? Among other things, it is the freedom to choose the right verification language for your project.
The world today is much more complex than it used to be a few years ago. Situations like acquisitions, mergers, remote-sites, and purchased third-party VIPs might create few challenging situations, especially for the managers who need to make choices.
Let’s talk about two common scenarios, integrating existing UVCs and choosing a language for new projects.
Integrating Existing UVCs
This is a very common scenario as a result of acquisitions. What would you do if you need to have an existing UVM-SV UVC interact with an existing UVM-e UVC? Will you rewrite one of them with the other language? Naturally, rewriting a UVC is a huge effort.
Fortunately, with UVM-ML you can reuse these existing UVCs and have them co-exist and communicate with the right topology) discussed in the following sections). As a manager, it saves you the effort of rewriting a UVC and if you want each team to continue working with the language it is used to, you can do this with UVM-ML.
Choosing a Language for New Projects
You might find yourself in a similar situation (as described above) even for a new project. For example, if you have two teams, and each team is used to working with a different language. Here, you can either select the best language for all the teams or let each team continue working with the language it is used to. In principle, the former option is preferred. Firstly, regardless of the power of UVM-ML, it is always easier having everything written in the same language. Secondly, you would prefer having all your people working with the language providing the best quality and productivity.
So, what is the best verification language?
Anyone who has worked with both e and SV knows by experience that e is much superior because of several reasons, but this is a subject for a different blog. It is true that Xcelium bypasses many limitations of the System Verilog LRM, however, still using e as the verification language is easier and more effective.
So, the best option would be to have everyone work with e, however, it is not always possible. In reality, there might be other factors and considerations. For example, you might have a team pressuring to continue with the language it is used to. In such a situation, as a manager you might decide to let each team select its preferred language. This is the flexibility you get with UVM-ML, this means you have a choice and you can have each team make its own choice.
So what is UVM-ML exactly?
UVM-ML library enables you to connect different UVCs written with UVM-e, UVM-SV, and UVM-SC. While we, as the R&D, are aware of its importance as the glue in several leading companies, it is always exciting to hear customers appreciate its capabilities. In 2018 US DVCon, HP won the best poster called: “Is e still relevant?”. In addition to the fact that the answer in the poster is “yes”, in this poster (and its relating paper), HP describes UVM-ML as the enabler for both reuse of the existing projects written in different languages and selecting the right language for each project (frankly speaking, we could not say it better…).
Figure 1:HP poster that won best poster in 2018 US DVCon
This poster and the paper include case studies and learnings from projects within the Silicon Design Lab (SDL) of HP. They are saying: “UVM-ML has a proven track record within SDL. It has been used for several years, spanning numerous projects… Through these projects, SDL has been able to take advantage of many of the advanced testing features available in Specman/e while utilizing a variety of UVMSV content from internally developed VCs to externally purchased Verification IPs.”.
UVM-ML was developed with AMD as an open source library provided in Accellera site. Since Incisive 15.2 it is provided also within incisive and Xcelium. We encourage our customers to use the version provided within Xcelium since it has an enhanced integration with Xcelium, however, there are some cases in which customers choose to use the open source version (you can always consult with the UVM-ML support team: support_uvm_ml@cadence.com).
UVM-ML supports multiple topologies according to the user environment. In a side-by-side hierarchy (parallel trees), the environment contains multiple tops, each top containing the components of a single language. In Unified hierarchy (single tree)- each component is instantiated in its logical location in the hierarchy. For simplicity, the two examples contain two languages, however can be extended to three.
Figure 2: Side by side example
Figure 3: unified hierarchy example
How does the magic work?
UVM-ML contains an inner backplane, services, etc. but the main part that is relevant to the user’s point of view is the adapter which has an API for connecting your UVC to the UVM-ML library. The API of each adapter is provided in the native language of the framework that is being connected, meaning there is a UVM-e adapter, a UVM-SV adapter, and a UVM-C adapter. This means that when you connect your UVC to the library, you do it with the language you are familiar with.
Figure 4: UVM-ML inner blocks
There is a lot of material out there about UVM-ML. You can read more about UVM-ML in the reference and user manuals in cdnshelp. If you want to quickly get started, it is recommended to read the following blogs:
- Multi-Language Verification Environment—Getting First Run in Few Minutes
- Multi-Language Verification Environment (#2) – Passing Items on TLM Ports, Using UVM ML
- Multi-Language Verification Environment (#3) – Connecting UVM Scoreboard to a Multi-Language Environment
- Multi-Language Verification Environment (#4)—Multi-Language Hierarchy
To wrap up, enjoy our multi choices world of verification!!!
Orit Kirshenberg
Specman team