Services like facial detection, efficient cloud server workload management, artificial intelligence, and image enhancement are all the rage these days; but creating a design to accommodate these needs can be incredibly taxing on your engineering resources. Luckily, Netspeed Systems is here to help.
The devices being designed nowadays are more complicated than ever, and the design requirements are more complex, too. Designers that want the highest performance, multi-core capabilities, mixed traffic requirements, and other features all delivered with either CPUs or GPUs need more. Designers today need a mix of both, for each of their strengths—they need heterogenous computing.
Services like facial detection, efficient cloud server workload management, and image enhancement all call upon heterogenous computing to meet their complex needs. Designers want to use GPUs for easily parallelized data and big data, while they also want CPUs for smaller data and highly-structured, non-parallelizable data. There’s also issues with efficient memory management and maintaining cache coherencies without compromising system-level quality-of-service.
This is where NetSpeed Gemini comes in.
Gemini is highly configurable—you can easily set your cache hierarchies and ensure caching and coherency participation. Its distributed architecture makes for lower latency and allows for floorplan-aware configurable cache hierarchies.
This is all pretty cool—but you still need software automation to help avoid deadlock in this complex computational platform. The burning question is: how do you know when you’re done with the verification? Netspeed’s architectural design approach seeks to answer exactly that question. You begin with a specification of your architectural requirements; then, Netspeed helps you weigh the different tradeoffs and explore the design space so you can find the best solution for your project. Then, you can get design feedback at any step of the process. This way, you can create and reach concrete goals.
The Netspeed platform has its own built-in simulator, called the Integrated Performance Simulator. This simulator—and its accompanying SystemC model—are great if you don’t have a solid grasp of your traffic requirements yet, and things are still a little more abstract. But, if you’re looking for something more precise, you want Verilog simulation—and the best way to get that is through the Cadence Interconnect Workbench (IWB). Cadence IWB gets you cycle accurate performance analysis, protocol checking via VIP, data consistency checking via IVD, and loads more—and it’s easy to execute on Xcelium or Palladium XP II or Z1. You can get great graphs showing your workload-base traffic simulations, alongside other data analytics to help you identify and fix your performance bottlenecks.
Next-generation applications are driving us to next generation architectures. Devices have caches everywhere, and they’re all snooping each other—how can you expect to keep coherency in that kind of chaos? With next-generation performance analysis—the kind brought to you by Cadence IWB and NetSpeed.
For more information on Netspeed Gemini, check here; for more information on the Cadence Interconnect Workbench, check here.