On Friday, January 12, Doulos is hosting a UVM Register Layer webinar, with the aim of helping users model UVM in certain less-intuitive ways. This webinar will cover the usage of user-defined front and back doors to extend register-layer capabilities past simple call-and-response transactions, understanding the role the predictor plays in updating the register model, and how to use register callbacks to model strange register behaviors. It will also discuss what changes you can and can’t make to UVM code without messing with the random stimulus generation.
Code examples running in Xcelium Parallel Simulator will be shown.