CDNLive Boston 2017: Teradyne reveals their success with JasperGold in their presentation, Success using Formal Verification--and now they join the ever-growing fold of JasperGold FPV (Formal Property Verifier) App users.
Teradyne had used some of JasperGold's functionality before with the JasperGold Connectivity App, but this marked a noted change in their usage of it by embracing more of the features the JasperGold suite offers. Previously, Teradyne was using Cadence Incisive Formal Verifier for those large mixed-signal SOCs.
Teradyne has had considerable success with formal verification for a long time. But why would they care so much about it? Formal verification is more exhaustive than other types. It looks at every block level, and tests all possible stimuli, one cycle at a time. The trade-off here is, obviously, that it takes longer than other verification types. This can be alleviated somewhat by having well-constructed formal constraints, but there is still a notable time increase.
Formal verification functions by creating properties of two types: assert properties and cover properties. Assertions report when they’re violated, and covers report when they’re hit. Assertions want the design to perform a certain action in a certain way, and they report when that doesn’t happen. Covers want certain areas of the design to be reached, and report when those areas are successfully accessed. Formal verification may explore all reachable states in a design, but it also might keep exploring until timeout.
The challenges with formal are mostly related to the size of the design. While it is superior in terms of coverage to other methods, it’s significantly slower, so 10-100k registers is a healthy range—however, good bug hunting methodologies can significantly extend that sweet spot. Formal also struggles when there’s a lot of sequential depth. In an over-constrained environment, formal doesn’t do all that much, so one should be careful not to use too many constraints if formal is on the table.
Teradyne realized that the comprehensive, exhaustive coverage offered by formal verification surmounted the challenges offered by switching handily.
Teradyne used the CONNECTION and CONDITION constraint keywords in an Excel-based Jasper Connectivity template with FPV. Their first experience was on a big mixed-signal SoC, and it was run post-RTL freeze. Right off the bat, Teradyne found an incredible three bugs in a complex controller block—two in FIFO control and one in error detection! This sort of thing can’t be run in simulation. Teradyne found those bugs much earlier than usual in their process with the FPV app, under only a few hours of setup! In their second experience, Teradyne found two simple and two complex bugs within forty-eight hours of running. Engineers working with JasperGold FPV gave feedback that it was more user-friendly and easier to debug than Incisive Verification was.
In the future, Teradyne plans to use JasperGold FPV on most future projects, and they want to develop more guidelines for assertions and usage of FPV’s tools.
For the full presentation on Teradyne’s experiences with JasperGold FPV, check here.