USB4 Version 2.0 specification was recently released by the USB Promoter Group. This specification enables up to 80 Gbps link speed per direction in symmetric mode, and up to 120 Gbps link speed in asymmetric mode. It has new feature capabilities in almost all the layers of the USB4 Version 1.0 specification, focus being on how to tunnel and transmit the data faster.
Some important feature updates in it are listed below,
- Logical Layer for Gen4 (40 Gbps x 2)
- PAM3 encoding
- New high-speed link training using new set of training sets, TS1, TS2, TS3 and TS4
- New link encoding stack, with new RS-FEC encoding and new Scrambler function
- New Ordered Sets structure
- Asymmetric Link with transition from Symmetric Link to Asymmetric Link and vice-versa
- Link recovery
- Simplified Low Power entry and exit flows
- Transport Layer
- Power Management (PM) packet
- No minimum headers gap
- Protocol Adapter Layers
- DP Tunneling
- Tunneling of 128b/132b DP constructs
- Power management enhancements through Panel Replay Optimization and ALPM
- PCIe Tunneling
- Max payload size greater than 128 bytes
- Packing of more DLLPs through the Extended Encapsulation feature
- USB3 Tunneling
- Gen T tunneling architecture for Enhanced SuperSpeed protocol to allow operation at the maximum bandwidth available on a USB4 Link
- DP Tunneling
- Time Synchronization
- Enhanced Uni-directional mode, that starts in Inversed Bi-directional mode and transitions to Adaptive Uni-directional mode.
Each of the new features introduced in USB4 Version 2.0 Specification brings along with it added complexity in design verification. For ex., Gen4 has its own logical layer stack and design components independent of Gen3 or Gen2 speeds. Hence verifying a Gen4 link is like verifying a new design.
Likewise, the other new features at other protocol layers have their own specific verification challenges. With the introduction of USB4 Version 2.0 features the verification space of USB4 designs has dramatically increased. It is not only about verifying the newly introduced features but also the ones in the USB4 Version 1.0 Specification. This demands for a verification solution that can scale and stride across features verification of both versions of USB4 Specification.
USB4 VIP supports a comprehensive set of new features of USB4 Version 2.0 specification. These features are enabled on the existing architecture of USB4 VIP. This allows the current users of it to easily enable the USB4 Version 2.0 features in their existing USB4 verification environment.
Cadence has a mature Verification IP solution, for the verification of various aspects of USB4 Version 2.0 and Version 1.0 design, with verification capabilities provided to do a comprehensive verification of these. You may refer to the Cadence USB4 VIP page for details.
Thank You.