SD Host Controller was introduced to transfer data to SD Card from system memory and vice versa. It also is the standard controller to manage the SD Card (SD Memory and SDIO). SD Association (SDA) maintains guidelines for designing SD Host Controller and related vendor products.
SD Host Controllers are implemented in mobile devices, PCs, and cameras. The main purpose of the controller is to provide a fast and simple interface to SD card. This helps in standardizing SD card slots.
SD cards are accessed through a series of SD commands by applications. SD Host controller driver sends those commands to SD Card through the Host Controller that is connected to the system bus. A single Host controller can manage multiple SD Cards through multiple SD Slots.
Though SDA provides guidelines, vendors choose to adopt or add custom commands within the guidelines boundary that can help with their product quality.
The below diagram shows the usage of the SD Host Controller.
One of the major challenges with the verification of any design is time to market. With the SD Card getting modified rapidly due to the demand for high performance and security, it becomes critical to have an upgraded SD Host Controller to support the upgraded SD Card, maintaining backward compatibility.
Recently, NAND technology has shown rapid progress resulting in an exponential increase in memory capacity. This demands much faster bus interface speed to shorten the time to access such capacity memory cards. SD Host Controller development will also be in accordance to support such growth.
SD Host Controller Cadence Verification IP (VIP) is based on “SD Specifications Part E1 SDIO Simplified Specification Version 3.00 and Part 1 Physical Layer Specification Version 3.01”. It is defined for SDIO Card, Embedded SDIO device, and Combo Card.
Below are the features Cadence VIP is capable of handling.
- Supports IO only, Memory only, and IO+Memory
- Supports UHS-I initialization and transmission
- 1-bit mode and 4-bit mode (SD Mode only)
- IO Aware and Non-IO Aware initialization sequences for both SD and SPI modes
- Supports auto-initialization and manual initialization
- For both IO and memory commands. Busy signaling supported with write commands for SD and SPI
- Clock stop and voltage switching command support
- Read wait and suspend and resume functionality
- Data transfer abort for both IO and memory
- Dynamic reset commands
- Commands to access card interface fixed registers
With the availability of the Cadence Verification IP for the SD Host Controller, users can ensure compliance with the standard and achieve the fastest path to IP and SoC verification closure.
More information on Cadence VIP is available on the Cadence VIP Website.