The Cadence VIP portfolio is used to provide various standard protocol VIPs for testing the DUT with respective protocol interfaces. All these VIPs are released together as VIPCAT release, which is called the VIP catalog. Since these fully tested VIPs are readily available, they will play a main role in reducing the time to market for the customer DUTs.
Cadence follows consistent architecture for all its VIPs and ensures a similar user interface for all of them. This enables seamless integration of different VIPs in the same environment. If the user is familiar with one VIP, using any cadence VIP is very easy.
This UCIe VIP course is based on the VIPCAT 11.30.094 version.
This course covers the following modules:
- Architecture
- Integration
- Configuration
- VIP Layer Description
- Test Writing
- Callbacks
- Messaging and Debugging
- Coverage
- Error Injection
This course starts with the “Architecture” which first explains Cadence generic VIP architecture along with its features. Then, it gives specific details of UCIe VIP architecture, followed by its key features, Verification topologies, and Data flow diagrams.
UCIe is a chiplet interconnect protocol that connects two chiplets in a substrate. The UCIe VIP is implemented as its three independent layers and can be instantiated as any single layer of all three layers together.
The UCIe top-level architecture is as shown below:
The “Integration” module covers how to integrate UCIe VIP with the DUT by giving an example of connecting VIP back-to-back.
The “Configuration” module covers the various ways of configuring the VIP, including the PureView tool, which generates a configuration file for all the VIPs.
The “VIP layer description” module covers the descriptions of all files of the UVM layer and methodology-independent layer.
The “Test writing” module covers the files required to create a testcase.
The diagram below shows the complete environment where the testcase is executed.
The “Callbacks” module is used to intercept transactions at various points of interest in the UCIe layers and enable to print or modify it.
The “Messaging and debugging” module is used to provide various messages and their interpretation along with waveform database which will help for debugging.
The “Coverage” module is used to track the verification progress for executed testcases.
The “Error Injection” module is used to inject an error in any selected transaction to test the robustness of DUT.
The course also contains the labs to exercise the understanding gained during course slides. The lab document contains detailed steps that need to be followed for the specified tasks.
The UCIe VIP Introduction Training is now available on the Cadence Training website.
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Related Training Bytes
Generic VIP Architecture and Key Features (Video)
Generic VIP architecture Expanded key features (Video)
UCIe VIP Dataflow Diagram (Video)
Configuration Overview (Video)
Protocol Transaction Callback (Video)
D2D Adapter Transaction Callback (Video)
Physical Transaction Callback (Video)
Callback Usage in UVM Verification Environment (Video)
Memory and Register Callbacks (Video)
Debugging with Trace Files (Video)
Debugging with Packet Tracker Files (Video)
Debugging with Verisium Waveform Debugger (Video)