Clik here to view.
Is it Time to Verify Your Chips in the Cloud? Part 3 of 3
Welcome back to our series on cloud verification solutions. This is the final part of a three-part blog—you can read part one here and part two here.Now, for the moment you’ve all been waiting for:...
View ArticleClik here to view.
Veriest to Host Verification Meetup in Serbia Featuring Specman Macros
Veriest, a member of the Cadence Verification Alliance, is holding a series of Meetups in Serbia to serve the growing technology community. The December 12th event will feature a session on Specman...
View ArticleClik here to view.
Tales From DAC: How Syntiant Went From Zero to Tapeout in Six Months
Here’s something to chew on:Syntiant is an AI startup involved in deep learning technology and semiconductor design. Their goal is to create exceptionally low-power designs for always-on devices, like...
View ArticleClik here to view.
Veriest to Host Verification Meetup in Serbia Featuring Specman Macros
Veriest, a member of the Cadence Verification Alliance, is holding a series of Meetups in Serbia to serve the growing technology community. The December 12th event will feature a session on Specman...
View ArticleClik here to view.
App Note Spotlight: Streamline Your SystemVerilog Code, Part III -...
Welcome back to the third installment of a special multi-part edition of the App Note Spotlight, where we’ll continue highlighting an interesting app note that you may have overlooked—Simulation...
View ArticleClik here to view.
Is It Time to Verify Your Chips in the Cloud? Part 2 of 3
Welcome back to our series on cloud verification solutions. This is part two of a three-part blog—you can read part one here.The high-performance computing (HPC) market continues to grow. Analysts say...
View ArticleClik here to view.
UVM-ML- Managers’ Freedom of Choice
Freedom of choice is a term we hear a lot, especially in the last 10 years. It is defined in wikipedia as “an individual's opportunity and autonomy to perform an action selected from at least two...
View ArticleClik here to view.
Is it Time to Verify Your Chips in the Cloud? Part 3 of 3
Welcome back to our series on cloud verification solutions. This is the final part of a three-part blog—you can read part one here and part two here.Now, for the moment you’ve all been waiting for:...
View ArticleClik here to view.
Tales From DAC: How Syntiant Went From Zero to Tapeout in Six Months
Here’s something to chew on:Syntiant is an AI startup involved in deep learning technology and semiconductor design. Their goal is to create exceptionally low-power designs for always-on devices, like...
View ArticleClik here to view.
Renesas Brings Their Legacy Testbench Up to Speed Using the Cadence...
Recently, Renesas Electronics Corporation faced a challenge. They were developing a new data conversion block, one that included an AHB bus bridge, which would be attached to a pre-existing DMA IP...
View ArticleClik here to view.
Tales from DAC: How Altia Systems Used Xcelium to Bring New Life to Virtual...
We’re going to take a wild guess and say you’ve been in a meeting before. Maybe it was a virtual meeting—but those never really feel the same in person, do they? Attending a virtual meeting can feel...
View ArticleClik here to view.
Renesas Brings Their Legacy Testbench Up to Speed Using the Cadence...
Recently, Renesas Electronics Corporation faced a challenge. They were developing a new data conversion block, one that included an AHB bus bridge, which would be attached to a pre-existing DMA IP...
View ArticleClik here to view.
Verification of ML IP and Specman—Our Hackathon Project
If you are lucky enough and your company spends a few working days each year on a Hackathon, you must know that it is usually a lot of fun. The latest 2018 Hackathon in Cadence was all about Machine...
View ArticleClik here to view.
New Training Bytes Available Now: All About SystemVerilog Classes
If you’re leaving 2018 with the feeling that your SystemVerilog skills are lacking, don’t worry—there’s a new series of Cadence Training Bytes to help you hit the ground running in 2019. Here you’ll...
View ArticleClik here to view.
Specman is Sweet – Bosch Sensortec's Story
Recently, Bosch Sensortec has been using Specman for their functional verification needs in their Inertial Measurement Unit, and they’re loving it.Why is Specman so cool? Well, it’s implementing the...
View ArticleClik here to view.
Tales From DAC: How Syntiant Went From Zero to Tapeout in Six Months
Here’s something to chew on:Syntiant is an AI startup involved in deep learning technology and semiconductor design. Their goal is to create exceptionally low-power designs for always-on devices, like...
View ArticleClik here to view.
Tales from DAC: How Altia Systems Used Xcelium to Bring New Life to Virtual...
We’re going to take a wild guess and say you’ve been in a meeting before. Maybe it was a virtual meeting—but those never really feel the same in person, do they? Attending a virtual meeting can feel...
View ArticleClik here to view.
Tales From DAC: Netspeed and the Cadence Interconnect Workbench Pair Up
Services like facial detection, efficient cloud server workload management, artificial intelligence, and image enhancement are all the rage these days; but creating a design to accommodate these needs...
View ArticleClik here to view.
Adding a Patch Just in Time! — Or Can You Really Allow Yourself to Waste So...
One animation video - Patch Like The Wind - is worth a thousand words :)If you don’t use Specman or don’t use Specman correctly, you spend most of your time waiting for compilation to finish.One of...
View ArticleClik here to view.
Come Join Us for "Deep Dive into the UVM Register Layer" - A Webinar From Duolos
Join us on September 14th for a free one-hour webinar on the finer aspects of the UVM register layer. We’ll be focusing on key aspects of the UVM Register Layer that can help you with your UVM modeling...
View Article