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And the Winner of the 2019 DVCon U.S. Best Paper Award Is...
Another successful DVCon U.S. 2019 has come and gone, but this year had a particularly interesting highlight. With nearly 900 attendees, a bigger program of tutorials, panels, papers, and posters, and...
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Tales from DAC: How Altia Systems Used Xcelium to Bring New Life to Virtual...
We’re going to take a wild guess and say you’ve been in a meeting before. Maybe it was a virtual meeting—but those never really feel the same in person, do they? Attending a virtual meeting can feel...
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Tales From DAC: Netspeed and the Cadence Interconnect Workbench Pair Up
Services like facial detection, efficient cloud server workload management, artificial intelligence, and image enhancement are all the rage these days; but creating a design to accommodate these needs...
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Adding a Patch Just in Time! — Or Can You Really Allow Yourself to Waste So...
One animation video - Patch Like The Wind - is worth a thousand words :)If you don’t use Specman or don’t use Specman correctly, you spend most of your time waiting for compilation to finish.One of...
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Come Join Us for "Deep Dive into the UVM Register Layer" - A Webinar From Duolos
Join us on September 14th for a free one-hour webinar on the finer aspects of the UVM register layer. We’ll be focusing on key aspects of the UVM Register Layer that can help you with your UVM modeling...
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App Note Spotlight: Streamline Your SystemVerilog Code, Part IV - Dynamic...
Welcome back to the fourth installment of a special multi-part edition of the App Note Spotlight, where we’ll continue highlighting an interesting app note that you may have overlooked—Simulation...
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Concurrent Actions in Specman
Lately we have been asked by several customers about the concurrency options in Specman (some refer to it as “What are the Specman options similar to fork…join?”). Apparently, things that are in...
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Cadence Leads the Pack: The First VIP for USB4 is Here!
On March 14th, Cadence announced the release of the industry’s first USB4-supporting Verification IP! The Cadence VIP for USB4 allows engineers to design and create cutting-edge SoC designs compliant...
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Cadence Announces Continued Partnership With Northrop Grumman
On March 28th, 2019, Cadence Design Systems announced an expanded collaboration with Northrop Grumman centering on advanced-node SoC projects. Cadence’s cutting-edge verification tools are combining...
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Specman Linting and the all_unique Method
Sorting according to pointers- why?One of the best practices that you need to follow when using Specman or any other tool is to use a linting tool on a regular basis to catch bugs early. In Specman, we...
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Cadence at the HOST Symposium: Come See What We're Doing!
The HOST Symposium is returning for its 12th year, and general registration is open now. The IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) aims to accelerate and assist...
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Cadence at the Red Hat Summit--Come See Xcelium in Action!
The Red Hat Summit is coming around to Boston this year, and it’s only a few short days away. Cadence has a demo at the Marvell booth (that’s #418-1), and we’ll be there from 3-7 PM on Wednesday, May...
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Concurrent Actions in Specman: Part 2
In the previous blog: Concurrent Actions in Specman, we discussed the existing options: all of (which awaits completion of all branches) and first of (which terminates at the first completion of any...
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Thinci Finds Success with the Cadence Verification Suite
On May 23rd, 2019, Cadence announced that Thinci has elected to use the complete Cadence Verification Suite to speed up the verification of their machine-learning and AI designs. Now, Thinci can access...
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Got IP Security Questions? This Luncheon at DAC Has Answers
If you’ve got security on the mind—and in this day and age, who doesn’t?—and you’re planning to attend DAC, be sure to stop by the Accellera-sponsored Luncheon Focusing on IP Security Assurance Issues...
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Specman: Python Is here!
Do you know from where Python technology gets its name? It is not from the snake, it is named after the Monty Python comedy group. And indeed, one of the main guidelines behind it is to be fun to use...
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Master of ‘e’? Now You Can Prove It!
The knowledge and experience of using Specman/e tells everyone that you have acquired profound verification methodology. But how do you showcase this knowledge to your company, colleagues, and...
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Tales from DAC: A Meeting of Security's Heroes at the Accellera Luncheon...
Figure 1: The panel and crowdCitizens—the tech world is in trouble. With the ever-expanding size and complexity of chip designs, security hasn’t kept up. Old techniques for securing a design are no...
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Tales from DAC: A Meeting of Security's Heroes at the Accellera Luncheon...
Welcome back to this account of the IP Security Panel at the Accellera Luncheon at DAC 2019. We’ve covered who’s seated on the panel and the moderator’s questions in the last installment (link to first...
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Master of ‘e’? Now You Can Prove It!
The knowledge and experience of using Specman/e tells everyone that you have acquired profound verification methodology. But how do you showcase this knowledge to your company, colleagues, and...
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