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India Needs Real-World Assertions Too
I've just returned from a week-long trip to India, spending most of my time at the Cadence R&D center in Noida. I was last there a year ago for our CDNLive! India 2010 event, a great show that...
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Video: Meet Formal and ABV R&D Team Leader Deepak Pant
Inspired by the positive response to my interview of Formal R&D Distinguished Engineer Alok Jain, while I was in India for CDNLive! I jumped at the opportunity to introduce to this community to...
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Update to the OVM Register Package
OVM users have something new to give thanks for this holiday season -- an update to the OVM Register Package (new link!!). This package is used by novice and advanced users and embodies years of...
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Video: Meet Incisive Enterprise Verifier R&D Architect Vinaya Singh
Continuing the series of introducing you to the people that create the tools you use every day, in this video the R&D Architect of Incisive Enterprise Verifier (a/k/a "IEV") Vinaya Singh talks...
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Secrets of the (Verification) Alliance
In a recent post, I discussed the need for cross-vendor cooperation in EDA, especially in my world of functional verification. It takes a blend of innovative technologies and methodologies to verify a...
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Holiday Idea #1: Give the Gift of UVM Knowledge
Your favorite verification engineer has been good all year. Thousands of tests run. Nights and weekends of debug. So how do reward her? Why, with UVM Training, of course!Cadence experts have trained...
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Embracing Our Competitors with the Connections Program
In my last blog post, I described the Cadence Verification Alliance (VA) and how it provides value to customers, VA members, and us. I've been pleasantly surprised at the readership numbers given that...
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Report on ARM Techcon 2011: Real and Virtual Software Apps, High-Speed...
The acid test of any conference is how long the information and lessons learned linger in your mind after the keynotes, panels, and demos wrap up. Like last year, the 2011 edition of ARM Techcon is...
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Early Holiday Present: Sudoku Solver Using Incisive Enterprise Verifier (IEV)...
Allow me to interrupt the excellent "Meet R&D" series to share a small holiday present. On the Functional Verification Shared Code Forum I've just posted a ZIP file with Sudoku solver code for...
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Video: Incisive Formal Verifier R&D Leader Pradeep Goyal talks about Expert...
Continuing the series that introduces you to the people that create the tools you use every day, in this video R&D lead for expert-level use cases in Incisive Formal Verifier (a/k/a "IFV") Pradeep...
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Some Final Real-World Assertions for the Holidays
My last "real-world assertions" blog post seems to have tickled a bunch of people with my story about the racy narration at the historic Red Fort in Delhi. I've heard from several folks who have also...
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Free Formal and ABV Webinar Recordings from 2011 Online Now!
In case you missed any of the 5 free webinars Team Verify presented in 2011, you're in luck: all of them have been recorded and posted for you to review at your leisure. Take your pick from the...
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Video: Bob Kurshan, Cadence Fellow and Incisive Formal R&D Leader, talks...
Continuing the series of introducing you to the people that create the tools you use every day, in this video I ask Bob Kurshan, Cadence Fellow and R&D leader of the Incisive Formal Verifier...
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2012 CES: Top 3 Trends Impacting EDA This Year
For years now consumer electronics have driven (nay, saved) the EDA industry. Hence, many events at last week's annual Consumer Electronics Show (CES) in Las Vegas can be extrapolated as leading...
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Event Report: Club Formal UK – Cache Coherency, UVM for ABV, and...
Right before the December holidays it was my privilege to host the first "Club Formal" here in the U.K. My colleagues and I welcomed over 20 power users from 8 different companies, providing an...
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Video Killed The Reference Manual Star
[Preface: recall the melody of the Buggles' 1979 hit "Video Killed the Radio Star" as you read the following]Q: What is your favorite pastime? A: Reading reference manuals!No? Really?OK -- with all...
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UVM: "Everything that Can be Invented Has Been Invented" Not True!
Much like Charles Duell's famous 1899 quote**, the notion that the Universal Verification Methodology (UVM) is the be-all and end-all of verification methodology is an urban legend. The new Advanced...
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Incisive Performance Scales to Meet Advanced Node SoC Verification Requirements
Its’ all about RTL simulation. I mean gates. I mean turn-around-time. Project-level productivity. Mixed-signal. Low-power. UVM. And. And. And. … And the reality is that advanced node SoCs are so...
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DVCon 2012 Preview: Focus on Formal & ABV Events and Papers
In a few short weeks DVCon 2012 will be upon us (Feb. 27 - March 1 in San Jose), and Team Verify and our colleagues on the Incisive Verification team will be there in force supporting tutorials,...
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Gentlemen, Start Your Simulation Engines
As we outlined in our recent performance white paper, every verification team has the need for higher performance simulation. Of course, you can expect on-going innovation from Cadence R&D, but...
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